Sotabase

Career

· Staff Engineer, SiFive2021–
· Doctor of Philosophy (Ph.D.), Computer Engineering, University of California, Berkeley2014–2020
· Graduate Student Researcher, University of California, Berkeley2014–2021
· IP Design Engineering Intern, Intel Corporation (Formerly Altera)2012–2013
· Undergrad Research Intern, Advanced Micro and Nanosystems Laboratory - Unversity of Toronto2011–2011
· Bachelor of Applied Science in Engineering Science, Electrical and Computer Engineering, University of Toronto2009–2014
· Summer Research Intern, Focused Ultrasound Laboratory - Sunnybrook Health Sciences Centre2008–2010

Publications (21)

The Rocket Chip Generator
2016
762
cited
Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs
IEEE Micro · 2020
315
cited
FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud
International Symposium on Computer Architecture · 2018
244
cited
FASED: FPGA-Accelerated Simulation and Evaluation of DRAM
Symposium on Field Programmable Gate Arrays · 2019
30
cited
DESSERT: Debugging RTL Effectively with State Snapshotting for Error Replays across Trillions of Cycles
International Conference on Field-Programmable Logic and Applications · 2018
26
cited
A Hardware Accelerator for Computing an Exact Dot Product
IEEE Symposium on Computer Arithmetic · 2017
21
cited
Golden Gate: Bridging The Resource-Efficiency Gap Between ASICs and FPGA Prototypes
2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) · 2019
18
cited
Evaluation of RISC-V RTL with FPGA-Accelerated Simulation
2017
17
cited
Invited: Chipyard - An Integrated SoC Research and Implementation Environment
Design Automation Conference · 2020
12
cited
Jitpcb
IEEE/RJS International Conference on Intelligent RObots and Systems · 2016
12
cited
Simulator Independent Coverage for RTL Hardware Languages
International Conference on Architectural Support for Programming Languages and Operating Systems · 2023
9
cited
Fine-Grained Interconnect Synthesis
Symposium on Field Programmable Gate Arrays · 2015
8
cited
Accessible, FPGA Resource-Optimized Simulation of Multiclock Systems in FireSim
IEEE Micro · 2021
5
cited
RETROSPECTIVE: FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud
2023
5
cited
Debugging RISC-V Processors with FPGA-Accelerated RTL Simulation in the FPGA Cloud
2018
2
cited
Using FireSim to Enable Agile End-to-End RISC-V Computer Architecture Research
2019
2
cited
Session details: Technical Session 7: High-level Synthesis and Tools
2016
The Rocket Chip Generator Krste
2016
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