Sotabase

Career

· Amazon Scholar, Amazon2023–
· Consultant, Facebook Novi2018–2022
· Associate Professor, New York University, Courant Institute of Mathematical Sciences2016–2016
· Professor (Research) of Computer Science, Stanford University2016–
· Visiting Researcher, Google2015–2017
· PhD in Computer Science, Stanford University2003–
· Intern, Intel1996–
· Intern, Microsoft Research1993–
· Pioneer in formal hardware verification, 0-in Design Automation (now part of Siemens/Mentor Graphics)

Publications (209)

Reluplex: An Efficient SMT Solver for Verifying Deep Neural Networks
International Conference on Computer Aided Verification · 2017
2,016
cited
The SMT-LIB Standard Version 2.0
2010
1,175
cited
Handbook of Satisfiability
Handbook of Satisfiability · 2021
635
cited
The Marabou Framework for Verification and Analysis of Deep Neural Networks
International Conference on Computer Aided Verification · 2019
569
cited
cvc5: A Versatile and Industrial-Strength SMT Solver
International Conference on Tools and Algorithms for Construction and Analysis of Systems · 2022
452
cited
Algorithms for Verifying Deep Neural Networks
Found. Trends Optim. · 2019
447
cited
CVC Lite: A New Implementation of the Cooperating Validity Checker Category B
International Conference on Computer Aided Verification · 2004
327
cited
CVC: A Cooperating Validity Checker
International Conference on Computer Aided Verification · 2002
244
cited
Validity Checking for Combinations of Theories with Equality
Formal Methods in Computer-Aided Design · 1996
217
cited
A DPLL(T) Theory Solver for a Theory of Strings and Regular Expressions
International Conference on Computer Aided Verification · 2014
189
cited
Checking Satisfiability of First-Order Formulas by Incremental Translation to SAT
International Conference on Computer Aided Verification · 2002
173
cited
A decision procedure for an extensional theory of arrays
Proceedings 16th Annual IEEE Symposium on Logic in Computer Science · 2001
170
cited
Counterexample-Guided Quantifier Instantiation for Synthesis in SMT
International Conference on Computer Aided Verification · 2015
147
cited
Solving quantified verification conditions using satisfiability modulo theories
Annals of Mathematics and Artificial Intelligence · 2007
137
cited
Provably Minimally-Distorted Adversarial Examples
2017
132
cited
A decision procedure for bit-vector arithmetic
Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175) · 1998
130
cited
SMT-COMP: Satisfiability Modulo Theories Competition
International Conference on Computer Aided Verification · 2005
128
cited
Splitting on Demand in SAT Modulo Theories
Logic Programming and Automated Reasoning · 2006
124
cited
Towards Proving the Adversarial Robustness of Deep Neural Networks
FVAV@iFM · 2017
123
cited
Satisfiability Modulo Theories
Handbook of Model Checking · 2018
122
cited
Sotabase