Sotabase

Career

· PhD in Computer Science, Princeton University2021–
· Postdoctoral Researcher, UC Berkeley2021–2021
· Assistant Professor, Computer Science and Engineering, University of Michigan2021–
· Staff Volunteer, UC Berkeley2020–2021
· Co-op Engineer, AMD Research2015–2015
· Software Engineer, Qualcomm Research2013–2014
· Interim Engineering Intern, Qualcomm Innovation Center2012–2012
· Master of Science, Computer Science and Engineering, University of Michigan2011–2013
· Software Development Engineer Intern, Amazon.com2010–2010
· Browser Developer Co-op, Research in Motion (BlackBerry)2009–2009
· Bachelor of Applied Sciences, Honours Computer Engineering (Co-op), University of Waterloo2006–2011
· Software Architect / Researcher, Qualcomm Research
· BASc in Computer Engineering, University of Waterloo
· Asst. Professor, Univ. Michigan Ann Arbor

Publications (24)

TriCheck: Memory Model Verification at the Trisection of Software, Hardware, and ISA
International Conference on Architectural Support for Programming Languages and Operating Systems · 2016
62
cited
CCICheck: Using μhb graphs to verify the coherence-consistency interface
Micro · 2015
47
cited
MOESI-prime: preventing coherence-induced hammering in commodity workloads
International Symposium on Computer Architecture · 2022
44
cited
RTLCheck: Verifying the Memory Consistency of RTL Designs
Micro · 2017
38
cited
Counterexamples and Proof Loophole for the C/C++ to POWER and ARMv7 Trailing-Sync Compiler Mappings
arXiv.org · 2016
29
cited
PipeProof: Automated Memory Consistency Proofs for Microarchitectural Specifications
Micro · 2018
20
cited
ILA-MCM: Integrating Memory Consistency Models with Instruction-Level Abstractions for Heterogeneous System-on-Chip Verification
Formal Methods in Computer-Aided Design · 2018
15
cited
UCLID5: Multi-modal Formal Modeling, Verification, and Synthesis
International Conference on Computer Aided Verification · 2022
14
cited
Towards Building Verifiable CPS using Lingua Franca
ACM Transactions on Embedded Computing Systems · 2023
8
cited
Automated Conversion of Axiomatic to Operational Models: Theory and Practice
Formal Methods in Computer-Aided Design · 2022
5
cited
RealityCheck: Bringing Modularity, Hierarchy, and Abstraction to Automated Microarchitectural Memory Consistency Verification
arXiv.org · 2020
5
cited
Full-Stack Memory Model Verification with TriCheck
IEEE Micro · 2018
4
cited
PipeSynth: Automated Synthesis of Microarchitectural Axioms for Memory Consistency
International Conference on Architectural Support for Programming Languages and Operating Systems · 2023
4
cited
TriCheck
2017
4
cited
Exploring the Trisection of Software, Hardware, and ISA in Memory Model Design
arXiv.org · 2016
3
cited
Lifting Micro-Update Models from RTL for Formal Security Analysis
International Conference on Architectural Support for Programming Languages and Operating Systems · 2024
2
cited
Progressive Automated Formal Verification of Memory Consistency in Parallel Processors
2021
2
cited
Kobold: Simplified Cache Coherence for Cache-Attached Accelerators
IEEE computer architecture letters · 2023
1
cited
SemPat: From Hyperproperties to Attack Patterns for Scalable Analysis of Microarchitectural Security
Conference on Computer and Communications Security · 2024
1
cited
SemPat: Using Hyperproperty-based Semantic Analysis to Generate Microarchitectural Attack Patterns
arXiv.org · 2024
1
cited
Sotabase
Yatin Manerkar | Researcher Profile | Sotabase | Sotabase