Sotabase

Career

· Principal Research Engineer, Arm2020–2023
· Staff Research Engineer, Arm2018–2020
· Senior Research Engineer, ARM2015–2018
· Performance Architect Intern, Samsung Austin R&D Center2013–2013
· PhD Candidate, Computer Science, Uppsala University2009–2016
· Grid Administrator, Institute of Communication and Computer Systems (NTUA)2008–2009
· Network Administrator, School of Electrical and Computer Engineering, NTUA2007–2009
· Diploma, Electrical and Computer Engineering, 8.01/10.00, National Technical University of Athens2003–2009

Publications (33)

The gem5 Simulator: Version 20.0+
arXiv.org · 2020
364
cited
Cache Pirating: Measuring the Curse of the Shared Cache
International Conference on Parallel Processing · 2011
73
cited
Bandwidth Bandit: Quantitative characterization of memory contention
IEEE/ACM International Symposium on Code Generation and Optimization · 2012
61
cited
Full Speed Ahead: Detailed Architectural Simulation at Near-Native Speed
IEEE International Symposium on Workload Characterization · 2015
52
cited
BRB: Mitigating Branch Predictor Side-Channels.
International Symposium on High-Performance Computer Architecture · 2019
48
cited
Synthesizing Formal Models of Hardware from RTL for Efficient Verification of Memory Model Implementations
Micro · 2021
23
cited
Fused: Closed-Loop Performance and Energy Simulation of Embedded Systems
IEEE International Symposium on Performance Analysis of Systems and Software · 2020
20
cited
Efficient State Retention through Paged Memory Management for Reactive Transient Computing
Design Automation Conference · 2019
17
cited
Bandwidth bandit: Understanding memory contention
IEEE International Symposium on Performance Analysis of Systems and Software · 2012
14
cited
Directed Statistical Warming through Time Traveling
Micro · 2019
13
cited
A software based profiling method for obtaining speedup stacks on commodity multi-cores
IEEE International Symposium on Performance Analysis of Systems and Software · 2014
9
cited
CoolSim: Statistical techniques to replace cache warming with efficient, virtualized profiling
International Conference / Workshop on Embedded Computer Systems: Architectures, Modeling and Simulation · 2016
7
cited
Extending statistical cache models to support detailed pipeline simulators
IEEE International Symposium on Performance Analysis of Systems and Software · 2014
7
cited
RTL2MμPATH: Multi-μPATH Synthesis with Applications to Hardware Security Verification
Micro · 2024
7
cited
Addressing Energy Challenges in Filter Caches
Symposium on Computer Architecture and High Performance Computing · 2017
5
cited
Pragmatic Memory-System Support for Intermittent Computing Using Emerging Nonvolatile Memory
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2023
5
cited
Execution Dependence Extension (EDE): ISA Support for Eliminating Fences
International Symposium on Computer Architecture · 2021
4
cited
Design and Evaluation of the Bandwidth Bandit
2012
3
cited
A Smart HPC Interconnect for Clusters of Virtual Machines
Euro-Par Workshops · 2011
2
cited
CoolSim: Eliminating traditional cache warming with fast, virtualized profiling
IEEE International Symposium on Performance Analysis of Systems and Software · 2016
2
cited
Sotabase
Nikos Nikoleris | Researcher Profile | Sotabase | Sotabase