Sotabase

Career

· Professor, New York University School of Engineering1998–

Publications (507)

Asleep at the Keyboard? Assessing the Security of GitHub Copilot’s Code Contributions
IEEE Symposium on Security and Privacy · 2021
615
cited
A Primer on Hardware Security: Models, Methods, and Metrics
Proceedings of the IEEE · 2014
586
cited
Trustworthy Hardware: Identifying and Classifying Hardware Trojans
Computer · 2010
500
cited
Security analysis of logic obfuscation
DAC Design Automation Conference 2012 · 2012
474
cited
Fault Analysis-Based Logic Encryption
IEEE transactions on computers · 2015
414
cited
Security analysis of integrated circuit camouflaging
Conference on Computer and Communications Security · 2013
382
cited
Scan based side channel attack on dedicated hardware implementations of Data Encryption Standard
2004 International Conferce on Test · 2004
366
cited
The Cybersecurity Landscape in Industrial Control Systems
Proceedings of the IEEE · 2016
328
cited
Secure scan: a design-for-test architecture for crypto chips
Proceedings - Design Automation Conference · 2005
316
cited
On Improving the Security of Logic Locking
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2016
298
cited
VeriGen: A Large Language Model for Verilog Code Generation
ACM Trans. Design Autom. Electr. Syst. · 2023
287
cited
Examining Zero-Shot Vulnerability Repair with Large Language Models
IEEE Symposium on Security and Privacy · 2021
284
cited
On design vulnerability analysis and trust benchmarks development
ICCD · 2013
279
cited
Chip-Chat: Challenges and Opportunities in Conversational Hardware Design
Workshop on Machine Learning for CAD · 2023
267
cited
The Robust QCA Adder Designs Using Composable QCA Building Blocks
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2007
245
cited
Manufacturing and Security Challenges in 3D Printing
2016
234
cited
Concurrent error detection schemes for fault-based side-channel cryptanalysis of symmetric block ciphers
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. · 2002
196
cited
Benchmarking Large Language Models for Automated Verilog RTL Code Generation
Design, Automation and Test in Europe · 2022
195
cited
Is split manufacturing secure?
Design, Automation and Test in Europe · 2013
194
cited
Cybersecurity of Smart Electric Vehicle Charging: A Power Grid Perspective
IEEE Access · 2020
180
cited
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