Sotabase

Career

· Assistant Professor, Cornell University1998–2002
· PhD Student, Cornell University1994–1998
· Professor, University of Central Florida

Publications (38)

Ieee Recommended Practice for Software Requirements Speciþcations Ieee-sa Standards Board Introduction Participants the following Persons Were on the Balloting Committee: Ieee Recommended Practice for Software Requirements Speciþcations 1. Overview 1.1 Scope 2. References Astm E1340-96, Standard Gui
1993
508
cited
The Stanford FLASH multiprocessor
Proceedings of 21 International Symposium on Computer Architecture · 1994
362
cited
The performance impact of flexibility in the Stanford FLASH multiprocessor
ASPLOS VI · 1994
136
cited
FLASH vs. (Simulated) FLASH: closing the simulation loop
ASPLOS IX · 2000
95
cited
The Effects of Latency, Occupancy, and Bandwidth in Distributed Shared Memory Multiprocessors
1995
71
cited
Flexible use of memory for replication/migration in cache-coherent DSM multiprocessors
Proceedings. 25th Annual International Symposium on Computer Architecture (Cat. No.98CB36235) · 1998
64
cited
Integrating performance monitoring and communication in parallel computers
Measurement and Modeling of Computer Systems · 1996
56
cited
Cache-coherent distributed shared memory: perspectives on its development and future challenges
Proceedings of the IEEE · 1999
47
cited
The performance and scalability of distributed shared memory cache coherence protocols
1998
34
cited
Using meta-level compilation to check FLASH protocol code
SIGP · 2000
31
cited
Digital system simulation: methodologies and examples
Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175) · 1998
29
cited
SMTp: an architecture for next-generation scalable multi-threading
Proceedings. 31st Annual International Symposium on Computer Architecture, 2004. · 2004
22
cited
Architectural support for uniprocessor and multiprocessor active memory systems
IEEE transactions on computers · 2004
19
cited
Latency, Occupancy, and Bandwidth in DSM Multiprocessors: A Performance Evaluation
IEEE Trans. Computers · 2003
18
cited
Leveraging cache coherence in active memory systems
International Conference on Supercomputing · 2002
11
cited
A Case For Asynchronous Active Memories
2000
9
cited
Ocean warning: avoid drowning
CARN · 2003
9
cited
Hardware/software co-design of the Stanford FLASH multiprocessor
Proceedings of the IEEE · 1997
8
cited
Active Memory Clusters: Efficient Multiprocessing on Commodity Clusters
International Symposium on High Performance Computing · 2009
7
cited
The impact of negative acknowledgments in shared memory scientific applications
IEEE Transactions on Parallel and Distributed Systems · 2004
7
cited
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Mark Heinrich | Researcher Profile | Sotabase | Sotabase