Sotabase

Career

· Chief Operating Officer, IBM Research2021–
· Vice President, Exploratory Science and University Collaborations, IBM Research2021–
· VP, IBM Research Global Exploratory Science & University Partnerships / Lab Director, Almaden & Japan, IBM Research2019–2021
· Vice President and Lab Director, IBM Research - Almaden, IBM Research2014–2021
· Director, Almaden Service Research & Accelerated Discovery Lab, IBM2012–2013
· Director of the Nanoelectronics Research Initiative (NRI), Semiconductor Research Corporation (SRC)2006–2012
· Director Next Generation Technology, IBM2003–2006
· Director SOI Technology, IBM2003–2003
· Leader of High-Performance CMOS Device Design, IBM Microelectronics2001–2003
· Assignment, IBM Technology Group2000–2001
· Adjunct Professor, Columbia University1995–2000
· Worked on novel silicon devices, IBM Research1995–2000
· Ph.D. in Electrical Engineering, Stanford University1990–1994
· Master of Science in Electrical Engineering, Stanford University1988–1989
· Bachelor of Science in Electrical Engineering, Stanford University1984–1988

Publications (124)

Comparative study of phonon‐limited mobility of two‐dimensional electrons in strained and unstrained Si metal–oxide–semiconductor field‐effect transistors
1996
445
cited
Electron mobility enhancement in strained-Si n-type metal-oxide-semiconductor field-effect transistors
IEEE Electron Device Letters · 1994
372
cited
Device and Architecture Outlook for Beyond CMOS Switches
Proceedings of the IEEE · 2010
287
cited
Electric-field penetration into metals: consequences for high-dielectric-constant capacitors
1999
172
cited
Digital Innovation and Strategic Transformation
IT Professional Magazine · 2016
161
cited
Strain dependence of the performance enhancement in strained-Si n-MOSFETs
Proceedings of IEEE International Electron Devices Meeting · 1994
154
cited
NMOS and PMOS transistors fabricated in strained silicon/relaxed silicon-germanium structures
1992 International Technical Digest on Electron Devices Meeting · 1992
126
cited
Enhanced hole mobilities in surface-channel strained-Si p-MOSFETs
Proceedings of International Electron Devices Meeting · 1995
107
cited
Small silicon memories: confinement, single-electron,. and interface state considerations
2000
56
cited
The quest for the next information processing technology
2008
51
cited
Multi-Label Patent Categorization with Non-Local Attention-Based Graph Convolutional Network
AAAI Conference on Artificial Intelligence · 2020
49
cited
Kinetic modelling of electron tunneling processes in quantum dots coupled to field-effect transistors
1998
42
cited
A high performance 90nm SOI technology with 0.992 /spl mu/m2 6T-SRAM cell
Digest. International Electron Devices Meeting, · 2002
36
cited
Growth and Processing of Relaxed-Si1-xGex/Strained-Si Structures for Metal-Oxide Semiconductor Applications
1994
31
cited
Capacitance-Voltage Characteristics of p-Si/SiGeC Mos Capacitors
1995
30
cited
Nanoscale CMOS : Special issue on quantum devices and their applications
1999
29
cited
Hole mobility improvement in silicon-on-insulator and bulk silicon transistors using local strain
International Electron Devices Meeting. IEDM Technical Digest · 1997
28
cited
Frontiers of Engineering: Reports on Leading-Edge Engineering from the 2008 Symposium
2009
26
cited
Evaluation of the valence band discontinuity of Si/Si/sub 1-x/Ge/sub x//Si heterostructures by application of admittance spectroscopy to MOS capacitors
1998
25
cited
Performance enhancement on sub-70 nm strained silicon SOI MOSFETs on ultra-thin thermally mixed strained silicon/SiGe on insulator (TM-SGOI) substrate with raised S/D
Digest. International Electron Devices Meeting, · 2002
25
cited
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Jeff Welser | Researcher Profile | Sotabase | Sotabase