Sotabase

Career

· Postdoctoral Researcher, RIKEN Center for Computational Science2022–2023
· Postdoctoral Researcher, Politecnico di Milano2020–2022
· Postdoctoral Researcher, IBM Research2019–
· Research Scientist, MIT FutureTech
· B.Sc. in Computer Engineering, Politecnico di Milano
· M.Sc. in Computer Engineering, Politecnico di Milano
· Ph.D. in Information Technology, Politecnico di Milano
· MS in Computer Science, University of Illinois at Chicago (UIC)

Publications (96)

Tiramisu: A Polyhedral Compiler for Expressing Fast and Portable Code
IEEE/ACM International Symposium on Code Generation and Optimization · 2018
291
cited
Pushing the Level of Abstraction of Digital System Design: A Survey on How to Program FPGAs
ACM Computing Surveys · 2022
54
cited
Workload-aware power optimization strategy for asymmetric multiprocessors
Design, Automation and Test in Europe · 2016
33
cited
A CAD-based methodology to optimize HLS code via the Roofline model
2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD) · 2020
22
cited
CICERO: A Domain-Specific Architecture for Efficient Regular Expression Matching
ACM Transactions on Embedded Computing Systems · 2021
21
cited
A Pipelined and Scalable Dataflow Implementation of Convolutional Neural Networks on FPGA
IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum · 2017
20
cited
A Common Backend for Hardware Acceleration on FPGA
ICCD · 2017
19
cited
An Energy-Efficient Domain-Specific Architecture for Regular Expressions
IEEE Transactions on Emerging Topics in Computing · 2023
18
cited
FPGA-based PairHMM Forward Algorithm for DNA Variant Calling
IEEE International Conference on Application-Specific Systems, Architectures, and Processors · 2018
17
cited
On the Automation of Radiomics-Based Identification and Characterization of NSCLC
IEEE journal of biomedical and health informatics · 2022
17
cited
A Unified Backend for Targeting FPGAs from DSLs
IEEE International Conference on Application-Specific Systems, Architectures, and Processors · 2018
16
cited
A Scalable FPGA Design for Cloud N-Body Simulation
IEEE International Conference on Application-Specific Systems, Architectures, and Processors · 2018
15
cited
Enhancing the Scalability of Multi-FPGA Stencil Computations via Highly Optimized HDL Components
ACM Transactions on Reconfigurable Technology and Systems · 2021
15
cited
A Framework for Customizable FPGA-based Image Registration Accelerators
Symposium on Field Programmable Gate Arrays · 2021
13
cited
Faber: A Hardware/SoftWare Toolchain for Image Registration
IEEE Transactions on Parallel and Distributed Systems · 2023
13
cited
Novel Union-Find-based Decoders for Scalable Quantum Error Correction on Systolic Arrays
IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum · 2023
13
cited
Tiramisu: A Code Optimization Framework for High Performance Systems
2018
13
cited
A Highly Scalable and Efficient Parallel Design of N-Body Simulation on FPGA
IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum · 2017
12
cited
OXiGen: A Tool for Automatic Acceleration of C Functions Into Dataflow FPGA-Based Kernels
IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum · 2018
11
cited
On the Automation of High Level Synthesis of Convolutional Neural Networks
IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum · 2016
10
cited
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Emanuele Del Sozzo | Researcher Profile | Sotabase | Sotabase