Sotabase

Career

· Assoc. Professor, UMass Amherst

Publications (76)

Power-Up SRAM State as an Identifying Fingerprint and Source of True Random Numbers
IEEE transactions on computers · 2009
802
cited
Initial SRAM State as a Fingerprint and Source of True Random Numbers for RFID Tags
2007
356
cited
PUFs at a glance
Design, Automation and Test in Europe · 2014
206
cited
FPGA Side Channel Attacks without Physical Access
IEEE Symposium on Field-Programmable Custom Computing Machines · 2018
121
cited
TARDIS: Time and Remanence Decay in SRAM to Implement Secure Protocols on Embedded Devices without Clocks
USENIX Security Symposium · 2012
90
cited
Low-power sub-threshold design of secure physical unclonable functions
International Symposium on Low Power Electronics and Design · 2010
85
cited
Persistent Clocks for Batteryless Sensing Devices
ACM Transactions on Embedded Computing Systems · 2016
82
cited
Physical Design Obfuscation of Hardware: A Comprehensive Investigation of Device and Logic-Level Techniques
IEEE Transactions on Information Forensics and Security · 2019
82
cited
A provable key destruction scheme based on memristive crossbar arrays
Nature Electronics · 2018
78
cited
Characterizing Power Distribution Attacks in Multi-User FPGA Environments
International Conference on Field-Programmable Logic and Applications · 2019
62
cited
Power Side-Channel Attacks on BNN Accelerators in Remote FPGAs
IEEE Journal on Emerging and Selected Topics in Circuits and Systems · 2021
57
cited
Incremental SAT-Based Reverse Engineering of Camouflaged Logic Circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2017
55
cited
Design as you see FIT: System-level soft error analysis of sequential circuits
2009 Design, Automation & Test in Europe Conference & Exhibition · 2009
52
cited
Oracle-guided incremental SAT solving to reverse engineer camouflaged logic circuits
Design, Automation and Test in Europe · 2016
48
cited
Remote Power Side-Channel Attacks on CNN Accelerators in FPGAs
arXiv.org · 2020
47
cited
Efficient PUF-Based Key Generation in FPGAs Using Per-Device Configuration
IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2019
46
cited
Reliable Physical Unclonable Functions Using Data Retention Voltage of SRAM Cells
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2015
45
cited
Security Evaluation and Enhancement of Bistable Ring PUFs
Workshop on RFID and IoT Security · 2015
44
cited
Power Wasting Circuits for Cloud FPGA Attacks
International Conference on Field-Programmable Logic and Applications · 2020
40
cited
Remote Power Attacks on the Versatile Tensor Accelerator in Multi-Tenant FPGAs
IEEE Symposium on Field-Programmable Custom Computing Machines · 2021
40
cited
Sotabase