Sotabase

Career

· Professor, Georgia Institute of Technology2008–
· Software Engineer, Georgia Institute of Technology2004–2008
· Design Engineer, Partban and Afratab Companies1994–1999

Publications (211)

The 2021 Magnonics Roadmap
Journal of Physics: Condensed Matter · 2021
338
cited
Carbon nanotube interconnects
ACM International Symposium on Physical Design · 2007
169
cited
Performance of weathering steel in bridges
1984
151
cited
Evaluation of the Potential Performance of Graphene Nanoribbons as On-Chip Interconnects
Proceedings of the IEEE · 2013
140
cited
3D heterogeneous integrated systems: Liquid cooling, power delivery, and implementation
IEEE Custom Integrated Circuits Conference · 2008
105
cited
Non-volatile Clocked Spin Wave Interconnect for Beyond-CMOS Nanomagnet Pipelines
Scientific Reports · 2015
72
cited
Performance Benchmarking for Graphene Nanoribbon, Carbon Nanotube, and Cu Interconnects
International Interconnect Technology Conference · 2008
72
cited
Quantum games and interactive tools for quantum technologies outreach and education
Optical Engineering: The Journal of SPIE · 2022
69
cited
Optimal global interconnects for GSI
2003
53
cited
Circuit Simulation of Magnetization Dynamics and Spin Transport
IEEE Transactions on Electron Devices · 2014
48
cited
Intsim: a CAD tool for optimization of multilevel interconnect networks
IEEE/ACM International Conference on Computer-Aided Design · 2007
46
cited
Power Delivery for 3-D Chip Stacks: Physical Modeling and Design Implication
IEEE Transactions on Components, Packaging, and Manufacturing Technology · 2012
45
cited
A Proposal for a Novel Hybrid Interconnect Technology for the End of Roadmap
IEEE Electron Device Letters · 2014
43
cited
A Proposal for Energy-Efficient Cellular Neural Network Based on Spintronic Devices
IEEE transactions on nanotechnology · 2016
41
cited
Bipolar Electric-Field Switching of Perpendicular Magnetic Tunnel Junctions through Voltage-Controlled Exchange Coupling.
Nano letters (Print) · 2019
37
cited
Design and Analysis of Copper and Aluminum Interconnects for All-Spin Logic
IEEE Transactions on Electron Devices · 2014
37
cited
Design and Analysis of Si Interconnects for All-Spin Logic
IEEE transactions on magnetics · 2014
36
cited
Impact of Dimensional Scaling and Size Effects on Spin Transport in Copper and Aluminum Interconnects
IEEE Transactions on Electron Devices · 2013
36
cited
An Expanded Benchmarking of Beyond-CMOS Devices Based on Boolean and Neuromorphic Representative Circuits
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits · 2017
35
cited
Non-Boolean Computing Benchmarking for Beyond-CMOS Devices Based on Cellular Neural Network
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits · 2016
34
cited
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